Message boards :
Number crunching :
Slashdot article states that Intel compiler deliberately creates unoptimized code.
Message board moderation
Author | Message |
---|---|
![]() Send message Joined: 2 Sep 04 Posts: 378 Credit: 10,765 RAC: 0 |
This might be something to keep in mind if people are compiling CPU specific 'optimized' clients like they do at the seti project.. it depends on which compiler you use. Slashdot is an interesting place to see people rant... http://yro.slashdot.org/article.pl?sid=05/07/12/1320202&threshold=-1&tid=142&tid=118&tid=123 Copy of the AMD legal complaint: http://www.amd.com/us-en/assets/content_type/DownloadableAssets/AMD-Intel_Full_Complaint.pdf Update:skimmed the legal complaint: compiler notes start in paragraph 123, page 40. |
![]() ![]() Send message Joined: 17 Sep 04 Posts: 103 Credit: 38,543 RAC: 0 ![]() |
http://yro.slashdot.org/article.pl?sid=05/07/12/1320202&threshold=-1&tid=142&tid=118&tid=123 Copy of the AMD legal complaint: http://www.amd.com/us-en/assets/content_type/DownloadableAssets/AMD-Intel_Full_Complaint.pdf Just trying to help. Jim |
![]() Send message Joined: 2 Sep 04 Posts: 309 Credit: 715,258 RAC: 0 |
I thought I read on the seti boards that the optimised seti application compiled using an Intel compiler for an AMD and it's instruction set actually ran a little faster than the equivalent for an Intel chip and it's instruction set. If wonder if the Intel lawyers will come across the seti optimised thread. Live long and crunch. Paul (S@H1 8888) ![]() ![]() |
![]() ![]() Send message Joined: 17 Sep 04 Posts: 103 Credit: 38,543 RAC: 0 ![]() |
As I understand it, if the instructions are compiled on an Intel, regardless of which chip it runs on, it will run fine. HOWEVER, if the code is compiled on an AMD, the compiler then inserts the bad code. Jim > I thought I read on the seti boards that the optimised seti application > compiled using an Intel compiler for an AMD and it's instruction set actually > ran a little faster than the equivalent for an Intel chip and it's instruction > set. If wonder if the Intel lawyers will come across the seti optimised > thread. > > Live long and crunch. > > |
Send message Joined: 29 Sep 04 Posts: 196 Credit: 207,040 RAC: 0 |
> HOWEVER, if the code is compiled on an AMD, the compiler then inserts the bad > code. ...unless the programmer overrides the CPUID to always report "GenuineIntel" and then AMD architectures receive the same optimizations any Intel chip would. The article told some of the story and the discussion was even more revealing. The part that interests me is something I had forgotten. MMX(2), SSE, SSE2, SSE3 are all Intel technologies which AMD had to license in order to remain "compatible" with the Pentium 4's newer features. This basically means the technology has to be implemented in AMD's processor line in a very specific way, Intel's way. So the argument really is "If AMD's Athlon line of processors contain Intel-licensed technology, why not could the Intel compiler support the very technologies in non-Intel CPUs which it uses in its own products as well as other companies' products which contain those technologies?" I could certainly understand Intel's position about not supporting other CPUs if the target CPU doesn't have the target technology which is being programmed for (i.e. if the Athlon64 doesn't have SSE3 and SS3 instructions are used then it *should* use an alternate codepath) - but we're talking Intel not supporting Intel technology in non-Intel products. It will be interesting watching this unfold in court. ![]() |
©2025 CERN